LPC47B27x
100 Pin Enhanced Super I/O Controller with LPC
Interface for Consumer Applications
FEATURES
3.3 Volt Operation (5 Volt Tolerant)
Fan Control
- Fan Speed Control Outputs
- Fan Tachometer Inputs
Programmable Wake-up Event Interface
PC98/99 and ACPI 1.0 Compliant
Dual Game Port Interface
MPU-401 MIDI Support
GPIO Pins (37)
ISA IRQ to Serial IRQ Conversion
ISA Plug-and-Play Compatible Register Set
Intelligent Auto Power Management
System Management Interrupt
2.88MB Super I/O Floppy Disk Controller
-
Licensed CMOS 765B Floppy Disk
Controller
-
Software and Register Compatible
with SMSC's Proprietary 82077AA
Compatible Core
-
Supports Two Floppy Drives Directly
-
Configurable Open Drain/Push-Pull
Output Drivers
-
Supports Vertical Recording Format
-
16-Byte Data FIFO
-
100% IBM Compatibility
-
Detects All Overrun and Underrun
Conditions
-
Sophisticated Power Control Circuitry
(PCC) Including Multiple Powerdown
Modes for Reduced Power
Consumption
-
DMA Enable Logic
-
Data Rate and Drive Control Registers
-
480 Address, Up to Eight IRQ and
Three DMA Options
Floppy Disk Available on Parallel Port Pins
Enhanced Digital Data Separator
-
2 Mbps, 1 Mbps, 500 Kbps, 300
Kbps, 250 Kbps Data Rates
-
Programmable Precompensation
Modes
Keyboard Controller
-
8042 Software Compatible
-
8 Bit Microcomputer
-
2k Bytes of Program ROM
-
256 Bytes of Data RAM
-
Four Open Drain Outputs Dedicated
for Keyboard/Mouse Interface
-
Asynchronous Access to Two Data
Registers and One Status Register
-
Supports Interrupt and Polling Access
-
8 Bit Counter Timer
-
Port 92 Support
-
Fast Gate A20 and KRESET Outputs
Serial Ports
-
Two Full Function Serial Ports
-
High Speed NS16C550 Compatible
UARTs with Send/Receive 16-Byte
FIFOs
-
Supports 230k and 460k Baud
Programmable Baud Rate Generator
Modem Control Circuitry
-
480 Address and 15 IRQ Options
Infrared Port
-
Multiprotocol Infrared Interface
-
32-Byte Data FIFO
-
IrDA 1.0 Compliant
-
Consumer IR
-
SHARP ASK IR
2
-
480 Address, Up to 15 IRQ and Three
DMA Options
Multi-ModeTM Parallel Port with ChiProtectTM
-
Standard Mode IBM PC/XT
,
PC/AT
,
and PS/2TM Compatible Bidirectional
Parallel Port
-
Enhanced Parallel Port (EPP)
Compatible - EPP 1.7 and EPP 1.9
(IEEE 1284 Compliant)
-
IEEE 1284 Compliant Enhanced
Capabilities Port (ECP)
-
ChiProtect Circuitry for Protection
-
480 Address, Up to 15 IRQ and Three
DMA Options
LPC Bus (Pin Reduced ISA) Host Interface
-
Multiplexed Command, Address and
Data Bus
- Serial IRQ Interface Compatible with
Serialized IRQ Support for PCI Systems
- PME Interface
100 Pin QFP Package
GENERAL DESCRIPTION
The LPC47B27x* is a 3.3V PC98/PC99
compliant Super I/O controller. The LPC47B27x
implements the LPC interface, a pin reduced ISA
bus interface which provides the same or better
performance as the ISA/X-bus with a substantial
savings in pins used. The LPC47B27x provides
fan control through two fan speed control output
pins and two fan tachometer input pins. It also
provides 37 general purpose input/output (GPIO)
pins, a dual game port interface, MPU-401 MIDI
support and ISA IRQ to Serial IRQ conversion.
The LPC47B27x incorporates a keyboard
interface, SMSC's true CMOS 765B floppy disk
controller, advanced digital data separator, two
16C550A compatible UARTs, one Multi-Mode
parallel port which includes ChiProtect circuitry
plus EPP and ECP, on-chip 12 mA AT bus
drivers, one floppy direct drive support, and
Intelligent Power Management including PME
support. The true CMOS 765B core provides
100% compatibility with IBM PC/XT and PC/AT
architectures in addition to providing data
overflow and underflow protection. The SMSC
advanced digital data separator incorporates
SMSC's patented data separator technology,
allowing for ease of testing and use. Both on-
chip UARTs are compatible with the
NS16C550A. The parallel port is compatible with
IBM PC/AT architecture, as well as IEEE 1284
EPP and ECP. The LPC47B27x incorporates
sophisticated power control circuitry (PCC) which
includes support for keyboard, mouse and
consumer infrared wake-up events. The PCC
supports multiple low power-down modes.
The LPC47B27x supports the ISA Plug-and-Play
Standard (Version 1.0a) and provides the
recommended functionality to support Windows
'95. The I/O Address, DMA Channel and
hardware IRQ of each logical device in the
LPC47B27x may be reprogrammed through the
internal configuration registers. There are 480
I/O address location options, a Serialized IRQ
interface, and three DMA channels.
The LPC47B27x does not require any external
filter components and is therefore easy to use
and offers lower system costs and reduced board
area. The LPC47B27x is software and register
compatible with SMSC's proprietary 82077AA
core.
IBM, PC/XT and PC/AT are registered trademarks and PS/2 is a
trademark of International Business Machines Corporation
SMSC is a registered trademark and Ultra I/O, ChiProtect, and
Multi-Mode are trademarks of Standard Microsystems Corporation
*The "x" in the part number is a designator that changes depending upon the particular BIOS used inside the
specific chip. "2" denotes AMI Keyboard BIOS and "7" denotes Phoenix 42i Keyboard BIOS.
3
TABLE OF CONTENTS
FEATURES ....................................................................................................................................... 1
GENERAL DESCRIPTION ................................................................................................................ 2
PIN CONFIGURATION ...................................................................................................................... 5
DESCRIPTION OF PIN FUNCTIONS ................................................................................................. 6
Buffer Type Descriptions............................................................................................................... 11
Pins That Require External Pullup Resistors.................................................................................. 11
BLOCK DIAGRAM .......................................................................................................................... 13
REFERENCE DOCUMENTS ........................................................................................................... 13
3 VOLT OPERATION / 5 VOLT TOLERANCE ................................................................................. 14
POWER FUNCTIONALITY .............................................................................................................. 14
VCC Power .................................................................................................................................. 14
VTR Support ................................................................................................................................ 14
Internal PWRGOOD ..................................................................................................................... 14
32.768 kHz Trickle Clock Input...................................................................................................... 14
Indication of 32kHz Clock ............................................................................................................. 15
Trickle Power Functionality ........................................................................................................... 15
VREF Pin ..................................................................................................................................... 17
Maximum Current Values.............................................................................................................. 17
Power Management Events (PME/SCI)......................................................................................... 17
FUNCTIONAL DESCRIPTION ......................................................................................................... 18
SUPER I/O REGISTERS .............................................................................................................. 18
HOST PROCESSOR INTERFACE (LPC)...................................................................................... 18
LPC INTERFACE ......................................................................................................................... 19
FLOPPY DISK CONTROLLER ........................................................................................................ 23
FDC INTERNAL REGISTERS ...................................................................................................... 23
COMMAND SET/DESCRIPTIONS ................................................................................................... 45
INSTRUCTION SET ........................................................................................................................ 48
SERIAL PORT (UART).................................................................................................................... 73
INFRARED INTERFACE ................................................................................................................. 87
MPU-401 MIDI UART ...................................................................................................................... 89
Overview...................................................................................................................................... 89
Host Interface............................................................................................................................... 90
MPU-401 Command Controller ..................................................................................................... 93
MIDI UART .................................................................................................................................. 93
MPU-401 Configuration Registers ................................................................................................. 94
PARALLEL PORT ........................................................................................................................... 95
IBM XT/AT COMPATIBLE, BI-DIRECTIONAL AND EPP MODES.................................................... 97
EXTENDED CAPABILITIES PARALLEL PORT .............................................................................103
PARALLEL PORT FLOPPY DISK CONTROLLER .........................................................................115
FLOPPY ON PARALLEL PORT PIN...............................................................................................117
POWER MANAGEMENT ................................................................................................................118
MPU-401 Power Management .....................................................................................................121
SERIAL IRQ...................................................................................................................................122
Timing Diagrams for SER_IRQ Cycle ...........................................................................................122
ISA IRQ TO SERIAL IRQ CONVERSION CAPABILITY ................................................................126
8042 KEYBOARD CONTROLLER DESCRIPTION .........................................................................127
Latches On Keyboard and Mouse IRQs .......................................................................................134
Keyboard and Mouse PME Generation ........................................................................................136
GENERAL PURPOSE I/O...............................................................................................................137
4
GPIO Pins...................................................................................................................................137
EITHER EDGE TRIGGERED INTERRUPTS ................................................................................144
LED FUNCTIONALITY ................................................................................................................144
WATCH DOG TIMER ..................................................................................................................144
SYSTEM MANAGEMENT INTERRUPT (SMI) .................................................................................146
PME SUPPORT..............................................................................................................................147
`WAKE ON SPECIFIC KEY' OPTION...........................................................................................148
FAN SPEED CONTROL AND MONITORING..................................................................................150
Fan Speed Control ......................................................................................................................150
Fan Tachometer Inputs................................................................................................................151
SECURITY FEATURE ....................................................................................................................155
GPIO Device Disable Register Control .........................................................................................155
Device Disable Register...............................................................................................................155
GAME PORT LOGIC ......................................................................................................................155
Power Control Register................................................................................................................158
VREF Pin ....................................................................................................................................158
ISA IRQ TO SERIAL IRQ CONVERSION CAPABILITY ..................................................................159
RUNTIME REGISTERS ..................................................................................................................160
CONFIGURATION..........................................................................................................................192
OPERATIONAL DESCRIPTION .....................................................................................................214
MAXIMUM GUARANTEED RATINGS..........................................................................................214
DC ELECTRICAL CHARACTERISTICS .......................................................................................214
TIMING DIAGRAMS .......................................................................................................................218
PACKAGE OUTLINE .....................................................................................................................242
APPENDIX - TEST MODE ..............................................................................................................243
Board Test Mode.........................................................................................................................243
80 Arkay Drive
Hauppauge, NY 11788
(516) 435-6000
FAX (516) 273-3123
5
PIN CONFIGURATION
LPC47B27x
100 PIN QFP
GP40/DRVDEN0
GP41/DRVDEN1
nMTR0
nDSKCHG
nDS0
CLKI32
VSS
nDIR
nSTEP
nWDATA
nWGATE
nHDSEL
nINDEX
nTRK0
nWRTPRT
nRDATA
GP42/nIO_PME
VTR
CLOCKI
LAD0
LAD1
LAD2
LAD3
nLFRAME
nLDRQ
nPCI_RESET
nLPCPD
GP43/DDRC/FDC_PP
PCI_CLK
SER_IRQ
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
nACK
BUSY
PE
SLCT
VSS
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
nSLCTIN
nINIT
VCC
GP37/A20M
GP36/nKBDRST
IRTX2/GP35
IRRX2/GP34
VSS
MCLK
MDAT
KCLK
KDAT
GP33/FAN1
GP32/FAN2
VCC
GP31/FAN_TACH1
GP30/FAN_TACH2
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
V
S
S
G
P
1
0
/
J
1
B
1
G
P
1
1
/
J
1
B
2
G
P
1
2
/
J
2
B
1
G
P
1
3
/
J
2
B
2
G
P
1
4
/
J
1
X
G
P
1
5
/
J
1
Y
G
P
1
6
/
J
2
X
G
P
1
7
/
J
2
Y
A
V
S
S
G
P
2
0
/
P
1
7
G
P
2
1
/
P
1
6
/
n
D
S
1
G
P
2
2
/
P
1
2
/
n
M
T
R
1
V
R
E
F
G
P
2
4
/
S
Y
S
O
P
T
G
P
2
5
/
M
I
D
I
_
I
N
G
P
2
6
/
M
I
D
I
_
O
U
T
G
P
6
0
/
L
E
D
1
G
P
6
1
/
L
E
D
2
G
P
2
7
/
n
I
O
_
S
M
I
3
1
3
2
3
3
3
4
3
5
3
6
3
7
3
8
3
9
4
0
4
1
4
2
4
3
4
4
4
5
4
6
4
7
4
8
4
9
5
0
G
P
5
7
/
n
D
T
R
2
/
I
R
Q
1
5
G
P
5
6
/
n
C
T
S
2
/
I
R
Q
1
1
G
P
5
5
/
n
R
T
S
2
/
I
R
Q
1
0
G
P
5
4
/
n
D
S
R
2
/
I
R
Q
9
G
P
5
3
/
T
X
D
2
/
I
R
Q
7
G
P
5
2
/
R
X
D
2
/
I
R
Q
5
G
P
5
1
/
n
D
C
D
2
/
I
R
Q
4
V
C
C
G
P
5
0
/
n
R
I
2
/
I
R
Q
3
n
D
C
D
1
n
R
I
1
n
D
T
R
1
n
C
T
S
1
n
R
T
S
1
n
D
S
R
1
T
X
D
1
R
X
D
1
n
S
T
R
O
B
E
n
A
L
F
n
E
R
R
O
R
1
0
0
9
9
9
8
9
7
9
6
9
5
9
4
9
3
9
2
9
1
9
0
8
9
8
8
8
7
8
6
8
5
8
4
8
3
8
2
8
1
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